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  • 12.10.2015 12:21:56
  • Arkadiusz Bukowiec [1]
  • [1] Institute of Computer Engineering and Electronics, University of Zielona Góra, Licealna 9, 65-417 Zielona Góra, Poland
  • Brak afiliacji
  1. Jacek Tkacz, Marian Adamski, Structured Mapping of Petri Net States and Events for FPGA Implementations. International Journal of Electronics and Telecommunications 2013; 59, 4, 331-339
  2. Michał Doligalski, Marian Adamski, Hierarchical Configurable Petri Net Modeling in VHDL. International Journal of Electronics and Telecommunications 2012; 58, 4, 397-402
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